In order to improve the operation efficiency and power efficiency of artificial intelligence accelerator, proposes a new convolutional neural network (CNN) accelerator, and realizes a computing-in-memory method. Firstly, a neural network architecture is designed, which has the characteristics of highly parallel computing and efficient operation of MAC unit. Secondly, in order to reduce power consumption and die size, a symmetric SRAM array and an adjustable data flow structure are adopted to realize the efficient computation of multi-layer network in SRAM, which reduces the times of external memory access and the power consumption of SoC system. Operation efficiency is improved as well. Through the 40 nm process of SMIC, the SOC design, tape and test are completed. Results show that the computational power can reach 288 GOPS at 500 MHz, the power consumption at full speed is 89. 4 MW, the area is 1. 514 mm 2 , the computational power consumption ratio is 3. 22TOPS / W and the 40nm computational power area ratio is 95. 1 GOPS / mm 2 . Compared with results in other literatures, the power consumption and area of computing power increase by at least 4. 54% and 134% , respectively, which is more suitable for embedded ends.